Transactions on Cryptographic Hardware and Embedded Systems 2025
Designing a General-Purpose 8-bit (T)FHE Processor Abstraction
Daphné Trama
Université Paris-Saclay, CEA-List, Palaiseau, France
Aymen Boudguiga
Université Paris-Saclay, CEA-List, Palaiseau, France
Pierre-Emmanuel Clet
Université Paris-Saclay, CEA-List, Palaiseau, France
Renaud Sirdey
Université Paris-Saclay, CEA-List, Palaiseau, France
Nicolas Ye
Université Paris-Saclay, CEA-List, Palaiseau, France
Keywords: Fully Homomorphic Encryption, TFHE, Programmable Bootstrapping, General Computations
Abstract
Making the most of TFHE programmable bootstrapping to evaluate functions or operators otherwise challenging to perform with only the native addition and multiplication of the scheme is a very active line of research. In this paper, we systematize this approach and apply it to build an 8-bit FHE processor abstraction, i.e., a software entity that works over FHE-encrypted 8-bit data and presents itself to the programmer by means of a conventional-looking assembly instruction set. In doing so, we provide several homomorphic LookUp Table (LUT) dereferencing operators based on variants of the tree-based method and show that they are the most efficient option for manipulating encryptions of 8-bit data (optimally represented as two basis 16 digits). We then systematically apply this approach over a set of around 50 instructions, including, notably, conditional assignments, divisions, or fixed-point arithmetic operations. We further test the approach on several simple algorithms, including the execution of a neuron with a sigmoid activation function with 16-bit precision. We conclude the paper by comparing our work to the FHE compilers available in the state of the art. Finally, this work reveals that a very limited set of functional bootstrapping patterns is versatile and efficient enough to achieve general-purpose FHE computations beyond the boolean circuit approach. As such, these patterns may be an appropriate target for further works on advanced software optimizations or hardware implementations.
Publication
IACR Transactions on Cryptographic Hardware and Embedded Systems, Volume 2025, Issue 2
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Artifact number
tches/2025/a12
Artifact published
July 18, 2025
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This work is licensed under the CeCILL-C Free Software License Agreement licence.
Note that license information is supplied by the authors and has not been confirmed by the IACR.
BibTeX How to cite
Daphné Trama, Aymen Boudguiga, Pierre-Emmanuel Clet, Renaud Sirdey, Nicolas Ye. (2025). Designing a General-Purpose 8-bit (T)FHE Processor Abstraction. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2025(2), 535–578. https://doi.org/10.46586/tches.v2025.i2.535-578. Artifact at https://artifacts.iacr.org/tches/2025/a12.