International Association for Cryptologic Research

International Association
for Cryptologic Research

Transactions on Cryptographic Hardware and Embedded Systems, Volume 2024

High-Performance Design Patterns and File Formats for Side-Channel Analysis


Jonah Bosland
Oregon State University, Corvallis, USA

Stefan Ene
Oregon State University, Corvallis, USA

Peter Baumgartner
Independent Security Researcher, Munich, Germany

Vincent Immler
Oregon State University, Corvallis, USA


Keywords: Side-Channel Analysis, High-Performance Computing, file format, HDF5, Zarr, SCARED, LASCAR, ChipWhisperer


Abstract

Data and instruction dependent power consumption can reveal cryptographic secrets by means of Side-Channel Analysis (SCA). Consequently, manufacturers and evaluation labs perform thorough testing of cryptographic implementations to confirm their security. Unfortunately, the computation and storage needs for the resulting measurement data can be substantial and at times, limit the scope of their analyses. Therefore, it is surprising that only few publications study the efficient computation and storage of side-channel analysis related data. To address this gap, we discuss high-performance design patterns and how they align with characteristics of different file formats. More specifically, we perform an in-depth analysis of common side-channel analysis algorithms and how they can be implemented for maximum performance. At the same time, we focus on storage requirements and how to reduce them, by applying compression and chunking. In addition, we investigate and benchmark popular SCA frameworks. Moreover, we propose SCARR, a proof of concept SCA framework based on the file format Zarr, that outperforms all considered frameworks in several common algorithms (SNR, TVLA, CPA, MIA) by a factor of about two compared to the thus far fastest framework for a given profile. Most notably, in all tested scenarios, we are faster even with file compression, than other frameworks without compression. We are convinced that the presented design patterns and comparative study will benefit the greater side-channel community, help practitioners to improve their own frameworks, and reduce data storage requirements, associated costs, and lower computation/energy demands of SCA, as required to perform more testing at scale.

Publication

Transactions of Cryptographic Hardware and Embedded Systems, Volume 2024, Issue 2

Paper

Artifact

Artifact number
tches/2024/a13

Artifact published
May 31, 2024

Badge
IACR CHES Artifacts Functional

README

zip (46080 Bytes)  

View on Github

A package with a large trace data set (15 GB) for this artifact is also available by request.

License

Some files in this archive are licensed under a different license. See the contents of this archive for more information.


BibTeX How to cite

Bosland, J., Ene, S., Baumgartner, P., & Immler, V. (2024). High-Performance Design Patterns and File Formats for Side-Channel Analysis. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024(2), 769–794. https://doi.org/10.46586/tches.v2024.i2.769-794. Artifact available at https://artifacts.iacr.org/tches/2024/a13