International Association for Cryptologic Research

International Association
for Cryptologic Research

Transactions on Cryptographic Hardware and Embedded Systems 2026

SoK: From Silicon to Netlist and Beyond: Two Decades of Hardware Reverse Engineering Research


Zehra Karadağ
Ruhr University Bochum (RUB), Bochum, Germany

Simon Klix
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

René Walendy
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

Felix Hahn
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

Kolja Dorschel
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

Julian Speith
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

Christof Paar
Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany

Steffen Becker
Ruhr University Bochum (RUB), Bochum, Germany; Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany


Keywords: Hardware Reverse Engineering, Systematization of Knowledge, IC Reverse Engineering, FPGA Reverse Engineering, Netlist Reverse Engineering


Abstract

Hardware serves as the root of trust in modern computing systems, making Hardware Reverse Engineering (HRE) essential for security assurance—from design verification and supply-chain integrity to vulnerability discovery. We scope HRE to netlist recovery and its subsequent analysis, spanning the three subdomains of Integrated Circuit (IC), Field-Programmable Gate Array (FPGA), and netlist reverse engineering. These subdomains differ in their methodologies, but share core processes and are shaped by common requirements and legal constraints of the same stakeholders. Despite an increasing number of publications, the field lacks a systematic understanding of how these obstacles have stunted the research ecosystem. To address this gap, we present the first large-scale Systematization of Knowledge (SoK) of the HRE workflow, analyzing 187 peer-reviewed publications. Across all three subdomains, we identify eleven concrete technical challenges—from a widening gap between academic research and modern semiconductor technology nodes to overly idealized assumptions in netlist analysis—and propose actionable directions for each. A retrospective evaluation of all 30 published artifacts reveals that key results could be reproduced for only seven, a mere 4% of all 187 papers in our corpus, confirming a systemic reproducibility crisis. We trace both the technical and reproducibility challenges to three structural barriers that recur across all subdomains: scarce reusable artifacts, missing benchmarks, and unresolved legal constraints on data sharing and collaboration. Based on these findings, we derive stakeholder-specific recommendations for academia, industry, and government to transition HRE from isolated research silos toward a collaborative discipline capable of assuring increasingly complex, global hardware supply chains.

Publication

IACR Transactions on Cryptographic Hardware and Embedded Systems, Volume 2026, Issue 4

Paper

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tches/2026/a58

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November 9, 2026

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BibTeX How to cite

Zehra Karadağ, Simon Klix, René Walendy, Felix Hahn, Kolja Dorschel, Julian Speith, Christof Paar, Steffen Becker. (2026). SoK: From Silicon to Netlist and Beyond: Two Decades of Hardware Reverse Engineering Research. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2026(4), 116–155. https://doi.org/10.46586/tches.v2026.i4.116-155. Artifact at https://artifacts.iacr.org/tches/2026/a58.