International Association for Cryptologic Research

International Association
for Cryptologic Research

Transactions on Cryptographic Hardware and Embedded Systems 2026

Racing against the clock:

side-channel leakage from crossing asynchronous clock domains


README

Support files for paper "Racing against the clock: side-channel leakage from crossing asynchronous clock domains"

Note that results will differ slightly each time (and from the tables in the paper) due to outlier removal using a random sampling approach to establish the median, and standard numerical precision.

How to run

Clone/extract the repository. Then, in the src folder, create and activate a virtual environment, install the requirements, and run the runall.sh script to generate all figures (as PNG) and a markdown representation of the tables.

cd src
python -m venv .venv
source .venv/bin/activate
pip install -r requirements.txt
./runall.sh

This has been tested on MacOS 15, Python 3.13.5.

Items covered:

initial_investigation.py

instructions

Operands

imx_original

fpga_frequencies

fpga_cpa

dma_timer_nop_add.py

covert_channel.py

modexp_attack.py and modexp_attack_plot.py

imx_tiny_aes.py