International Association for Cryptologic Research

International Association
for Cryptologic Research

Transactions on Cryptographic Hardware and Embedded Systems, Volume 2022

Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4

Amin Abdulrahman
Ruhr University Bochum

Jiun-Peng Chen
Academia Sinica

Yu-Jia Chen
InfoKeyVault Technology (IKV)

Vincent Hwang
National Taiwan University and Academia Sinica

Matthias J. Kannwischer
Academia Sinica

Bo-Yin Yang
Academia Sinica

Keywords: NTT, Saber, Cortex-M4, Cortex-M3, NISTPQC


The U.S. National Institute of Standards and Technology (NIST) has designated ARM microcontrollers as an important benchmarking platform for its Post-Quantum Cryptography standardization process (NISTPQC). In view of this, we explore the design space of the NISTPQC finalist Saber on the Cortex-M4 and its close relation, the Cortex-M3. In the process, we investigate various optimization strategies and memory-time tradeoffs for number-theoretic transforms (NTTs). Recent work by [Chung et al., TCHES 2021 (2)] has shown that NTT multiplication is superior compared to Toom–Cook multiplication for unprotected Saber implementations on the Cortex-M4 in terms of speed. However, it remains unclear if NTT multiplication can outperform Toom–Cook in masked implementations of Saber. Additionally, it is an open question if Saber with NTTs can outperform Toom–Cook in terms of stack usage. We answer both questions in the affirmative. Additionally, we present a Cortex-M3 implementation of Saber using NTTs outperforming an existing Toom–Cook implementation. Our stack-optimized unprotected M4 implementation uses around the same amount of stack as the most stack-optimized Toom–Cook implementation while being 33%-41% faster. Our speed-optimized masked M4 implementation is 16% faster than the fastest masked implementation using Toom–Cook. For the Cortex-M3, we outperform existing implementations by 29%-35% in speed. We conclude that for both stack- and speed-optimization purposes, one should base polynomial multiplications in Saber on the NTT rather than Toom–Cook for the Cortex-M4 and Cortex-M3. In particular, in many cases, multi-moduli NTTs perform best.


Transactions of Cryptographic Hardware and Embedded Systems, Volume 2022, Issue 1



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February 25, 2022


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BibTeX How to cite

Abdulrahman, A., Chen, J.-P., Chen, Y.-J., Hwang, V., Kannwischer, M. J., & Yang, B.-Y. (2021). Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1), 127–151. Artifact at